| Bug | Description |
|---|
| CVE-2020-0549 | Cleanup errors in some data cache evictions for some Intel(R) Processo ... |
| CVE-2020-0548 | Cleanup errors in some Intel(R) Processors may allow an authenticated ... |
| CVE-2020-0543 | Incomplete cleanup from specific special register read operations in s ... |
| CVE-2019-14607 | Improper conditions check in multiple Intel® Processors may allow ... |
| CVE-2019-11139 | Improper conditions check in the voltage modulation interface for some ... |
| CVE-2019-11135 | TSX Asynchronous Abort condition on some CPUs utilizing speculative ex ... |
| CVE-2019-11091 | Microarchitectural Data Sampling Uncacheable Memory (MDSUM): Uncacheab ... |
| CVE-2018-3646 | Systems with microprocessors utilizing speculative execution and addre ... |
| CVE-2018-3640 | Systems with microprocessors utilizing speculative execution and that ... |
| CVE-2018-3639 | Systems with microprocessors utilizing speculative execution and specu ... |
| CVE-2018-3620 | Systems with microprocessors utilizing speculative execution and addre ... |
| CVE-2018-3615 | Systems with microprocessors utilizing speculative execution and Intel ... |
| CVE-2018-12130 | Microarchitectural Fill Buffer Data Sampling (MFBDS): Fill buffers on ... |
| CVE-2018-12127 | Microarchitectural Load Port Data Sampling (MLPDS): Load ports on some ... |
| CVE-2018-12126 | Microarchitectural Store Buffer Data Sampling (MSBDS): Store buffers o ... |
| CVE-2017-5715 | Systems with microprocessors utilizing speculative execution and indir ... |